CLK AT 7SEG

CLK을 입력받아. 7SEGMENT 값들이 증가되어 출력되도록 한다.

---

PIN 테이블

핀 번호	신호
PIN_AA13	led_out[0]
PIN_AA14	led_out[1]
PIN_AA15	led_out[2]
PIN_AA16	led_out[3]
PIN_AA17	led_out[4]
PIN_AA18	led_out[5]
PIN_AA19	led_out[6]
PIN_AA20	led_out[7]
PIN_AB14	seg[6]
PIN_AB15	seg[5]
PIN_AB16	seg[4]
PIN_AB17	seg[3]
PIN_AB18	seg[2]
PIN_AB19	seg[1]
PIN_AB20	seg[0]
PIN_T2	clk

---

VHDL 코드

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;   -- 정수형 연산용

entity seg_clk is
   port(
      clk     : in  std_logic;                  -- 50MHz 클럭 입력
      led_out : out std_logic_vector(0 to 7);   -- LED 출력
      seg     : out std_logic_vector(6 downto 0) -- 7세그 출력
   );
end entity;

architecture rtl of seg_clk is
   ----------------------------------------------------------------
   -- 신호 선언
   ----------------------------------------------------------------
   signal cnt      : unsigned(25 downto 0) := (others => '0');  -- 50MHz → 1Hz 분주용
   signal sec_tick : std_logic := '0';                          -- 1초 펄스
   signal num      : unsigned(3 downto 0) := (others => '0');   -- 0~15 카운트
begin
   ----------------------------------------------------------------
   -- 50MHz → 1Hz 분주기 (1초마다 sec_tick='1')
   ----------------------------------------------------------------
   process(clk)
   begin
      if rising_edge(clk) then
         if cnt = 49_999_999 then   -- 50,000,000 - 1
            cnt <= (others => '0');
            sec_tick <= '1';
         else
            cnt <= cnt + 1;
            sec_tick <= '0';
         end if;
      end if;
   end process;

   ----------------------------------------------------------------
   -- 초당 1회 숫자 증가 (0~15 순환)
   ----------------------------------------------------------------
   process(clk)
   begin
      if rising_edge(clk) then
         if sec_tick = '1' then
            if num = 15 then
               num <= (others => '0');
            else
               num <= num + 1;
            end if;
         end if;
      end if;
   end process;

   ----------------------------------------------------------------
   -- 숫자 → 7세그 변환
   ----------------------------------------------------------------
   with num select
      seg <=
         ("100" & "0000") when "0000",  -- 0
         ("111" & "1001") when "0001",  -- 1
         ("010" & "0100") when "0010",  -- 2
         ("011" & "0000") when "0011",  -- 3
         ("001" & "1001") when "0100",  -- 4
         ("001" & "0010") when "0101",  -- 5
         ("000" & "0010") when "0110",  -- 6
         ("111" & "1000") when "0111",  -- 7
         ("000" & "0000") when "1000",  -- 8
         ("001" & "0000") when "1001",  -- 9
         ("000" & "1000") when "1010",  -- A
         ("000" & "0011") when "1011",  -- b
         ("100" & "0110") when "1100",  -- C
         ("010" & "0001") when "1101",  -- d
         ("000" & "0110") when "1110",  -- E
         ("000" & "1110") when "1111",  -- F
         ("111" & "1111") when others;  -- blank

   ----------------------------------------------------------------
   -- LED 출력 (기존 그대로 유지)
   ----------------------------------------------------------------
   led_out(7) <= '1';
   led_out(6) <= '0';
   led_out(5) <= '0';
   led_out(4) <= '0';
   led_out(3) <= '0';
   led_out(2) <= '0';
   led_out(1) <= '0';
   led_out(0) <= '1';
end architecture;

---